The present invention relates generally to slew rate control, and more particularly to dynamic on chip slew rate control.
Slew rate is a ratio of the rise or fall in voltage to the length of time required for that rise or fall. Consequently, slew rate tends to be a controlling factor in the performance characteristics of electronic devices. A device having a low slew rate can degrade the performance and speed of a system containing the device, while a device having a high slew rate may not allow a system to react to changes in the state of the device and thereby cause errors in the system.
The effects of slew rates have led manufacturers of systems requiring processors, such as automotive electronic systems, to specify performance parameters into which device slew rate characteristics must fall in order to properly operate within those systems. Process variations between different fabrication methods, however, tend to cause large variations in device characteristics, such as drain to source current. Characteristic variations substantially bar devices from consistently exhibiting slew rate characteristics within the performance requirements. Therefore, substantial need exists for a buffer that allows adjustment of slew rate characteristics after a circuit or device has been manufactured.
The output current of typical semiconductor drivers varies with process, temperature, and supply voltage. To guarantee the desired operation for nominal values, typical drivers are designed to output nominal currents, which are greater than minimum current required under normal operating conditions. During rapid electrical processes, these currents can potentially become several times greater than the minimum required. Large currents tend to result in high voltage slew rates, which inject noise into analog portions of mixed signal systems.
Power transistors, such as Metal-Oxide Semiconductor (MOS) transistors, dissipate large amounts of power in their collector-base junctions. The dissipated power is converted into heat, which raises the junction temperature. The junction temperature should not exceed a component specific maximum temperature, or the transistor will stiffer permanent damage. The range for typical transistors is between 150xc2x0 C. and 200xc2x0 C.
Most automotive power integrated circuits (ICs) have a slew control on the output voltage to minimize radiated emissions in compliance with requirements in automotive electronics systems, which typically require slew rates around 1 V/xcexcs. A difficulty encountered in many circuits having very large inductive loads, however, is power dissipation. For clamped inductive loads, a lower slew rate value causes an increase in switching loses and leads to a rapid increase in junction temperature.
Most Automotive ICs include thermal shutdown protection circuits, which are typically set at 10 to 25 degrees above the recommended maximum temperature of 150xc2x0 C. tip to which junctions are substantially operable. After junction temperature reaches this set value, the output driver is turned off. This operation allows the device to protect itself in case of thermal overload.
For reliability, it is desirable to prevent junction temperatures from exceeding 150xc2x0 C. This limitation is generally accomplished through appropriate heat sinking and driver size. Under certain circumstances, however, these solutions are cost prohibitive and impractical. During development or early production phases, thermal issues require manual adjustments to the slew rate of the output driver. Developers and designers resultantly trade off between improved emissions it lower operating temperatures and improved thermal performance at higher operating temperatures. A system for controlling slew rate at various temperature conditions would substantially solve this problem.
The disadvantages associated with current slew rate control techniques hare made it apparent that a new technique to regulate slew rate is necessary. The new technique should reduce power dissipation generated from switching loses in integrated circuits with large output devices at substantially low cost and should also enable circuit designers to fine-tune the Output voltage slew rate as a function of temperature to obtain an optimal overall thermal performance. The present invention is directed to these ends.
The present invention provides a system and method for slew rate control. The present invention also provides a method for dynamic, on chip control of slew rate.
In accordance with one aspect of the present invention, a slew rate control system for a circuit, which includes a temperature sensitive device adapted to generate a temperature signal, is disclosed. A temperature dependent current source is adapted to generate a first current source signal. A slew rate controller is adapted activate in response to the temperature signal when the temperature exceeds a first threshold. The slew rate controller is further adapted to generate a slew rate control signal by adjusting slew rate as a function of the temperature signal. The slew rate controller is further adapted to activate the temperature dependent current source in response to the slew rate control signal.
In accordance with another aspect of the present invention, a method for reducing power dissipation in a circuit having an output device, comprising: activating a slew rate controller in response to a temperature rise in an element of the circuit above a threshold; regulating said slew rate as a function of said temperature increase above said threshold; and generating a slew rate control signal, is disclosed.
One advantage of the present invention is that it facilitates substantially optimal performance at lower temperatures and optimal thermal performance at higher temperatures. A further advantage is that it protects the circuit during thermal overload. Additional advantages and features of the present invention will become apparent from the description that follows and may be realize by the instrumentalities and combinations particularly pointed out in the appended claims, taken in conjunction with the accompanying drawings.
FIG. 1 is a slew rate control system in accordance with an embodiment of the present invention;
FIG. 2 is a schematic diagram of the slew rate control system of FIG. 1;
FIG. 3 is a graph of current as a function of temperature for a transistor of FIG. 2;
FIG. 4 is a graph of the rise and fall time as a function of temperature for the system of FIG. 2;
FIG. 5 is a graph of the rise and fall time as a function of temperature for the system of FIG. 2; and
FIG. 6 is a block diagram of a method for reducing power dissipation due to slew rate in accordance with an embodiment of the present invention.